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FORDHAM UNIVERSITY CSLU 3593

Fordham College Lincoln Center Computer Organization

Dept. of Computer and Info. Science Spring, 2005

Fordham College Lincoln Center Computer Organization

Dept. of Computer and Info. Science Spring, 2005

Homework Assignment 2

**Due date:** February 7

**B.5a**- [15] §§B.2,B.3 (Exercise moved from set
1.) Using a diagram in the same style as the one in Figure B.3.5,
show how to implement a full-adder using a PLA.
**B.5b**- [10 EC] RTL Handout This exercise is
extra credit since it requires some understanding of the laws of
electricity. It is exercise 1 of the RTL Handout.
- Explain why the circuit in Figure 5 of the RTL Handout will function the same if the rightmost 2.2 k resistor connecting the rightmost transistor to V is removed.
- Explain why that resistor is included in the circuit diagram
if it is unnecessary.
*Hint:*think beyond the present application.

**B.10**- [10] §§B.2,B.3 Prove that a two-input
multiplexor is also universal by showing how to build the NAND (or
NOR) gate using two-input multiplexors. (You will need to use some
fixed logic signals as inputs in addition to the two data bits.)
**B.14**- [10] §§B.2,B.3 Implement a switching
network that has two data inputs ( and ), two data outputs
( and ), and a control input (). If equals 1, the
network is in pass-through mode, and should equal , and
should equal . If equals 0, the network is in crossing mode,
and should equal , and should equal . You may use any
of the elementary circuit building-blocks discussed in Sections B.2
and B.3. Show work.
**B.25a**- [15] Binary Adder Handout
This is exercise 1 of the Binary Adder Handout.
The correctness of
the full-adder design based on half-adders was justified informally
in section 3.3 of the Binary Adder Handout. Give a formal proof that the
circuit in Figure 6 of that handout is a full-adder,
by constructing a truth table showing the intermediate signals
and the outputs, propagating the logic relationships specified by
the circuit diagram.

Robert Moniot 2005-01-31