Back to course home page

FORDHAM UNIVERSITY CSLU 3593
Fordham College Lincoln Center Computer Organization
Dept. of Computer and Info. Science Spring, 2005

Homework Assignment 3
Due date: February 14

B.13a

[15] $<$§§B.2,B.3$>$ A combinational circuit is to be designed that compares two 2-bit (unsigned) binary numbers $A$ and $B$. Thus it has 4 inputs, 2 for $A$ and 2 for $B$. It has 3 outputs, $G$, $E$, and $L$: $G$ is true if $A > B$, $E$ is true if $A=B$, and $L$ is true if $A<B$ numerically. Write down the truth table for this circuit, and express each output as a sum of minterms (using $\Sigma$ notation).

B.17a

[10] $<$§§B.3$>$ A combinational circuit is to be designed for a quality-control station on an assembly line. The circuit has three inputs, $A$, $B$, and $C$ providing the results of quality checks, and one output $P$ that is true if the product passes the test. If $A$ is false, then the product fails regardless of $B$ and $C$. If $A$ is true, then the product passes if either $B$ or $C$ is true. It is not possible for both $B$ and $C$ to be true at the same time. Write down the function table for this circuit, showing both input and output don't-cares. Write down a boolean expression for $P$ in sum-of-products form, using the don't-cares to make $P$ as simple as possible.

B.35a

[10] $<$§B.8$>$ A T (or toggle) flip-flop has a single control input $T$ besides the clock. If $T=0$, then the flip-flop holds its output $Q$ steady. If $T=1$, then upon arrival of the clock signal, the flip-flop changes its output to the complement of what it was before. Show how to implement a T flip-flop using an edge-triggered R-S flip-flop and some external logic gates.

B.36a

[15] $<$§B.8$>$ Figures B.8.8 and B.8.9 on pages B-55 and B-66 illustrate the implementation of the register file for the MIPS datapath. Pretend that a new register file is to be built, but that there are only two registers, one read port and one write port, and that each register has only 2 bits of data. Draw a new figure combining the designs in Figures B.8.8 and B.8.9 into one figure with both write port and read port implementations shown, and in which every wire corresponds to only 1 bit of data (unlike the figures in the text, in which some wires are 1 bit, some are 5 bits, and some 32 bits). Depict the registers as D flip-flops. You do not need to show how to implement a D flip-flop, a decoder, or a multiplexor.